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* Add flag to hoist instructions (#6740)jarcherNV2025-04-11
| | | | | | | | | This fixes issue #6654 Only hoist instructions that are optimized by prepareFuncForForwardDiff. Add flag hoistLoopInvariantInsts to IRSimplificationOptions and set this to true only if called from prepareFuncForForwardDiff, then only hoist if the flag is set. Additionally, do not hoist loops if they only have a single trivial iteration.
* Add SPIRV atomic debug type (#6616)Darren Wihandi2025-03-19
| | | Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Update SPIRV-Tools and fix new validation errors. (#6511)Yong He2025-03-06
| | | | | | | * Update SPIRV-Tools and fix new validation errors. * Implement pointers for glsl target. * Reworked packStorage/unpackStorage code gen to operate on pointers rather than values.
* Map `SV_InstanceID` to `gl_InstanceIndex-gl_BaseInstance` (#6468)Yong He2025-02-27
| | | | | * Map `SV_InstanceID` to `gl_InstanceIndex-gl_BaseInstance` * Fix ci.
* [SPIRV]: Emit missing storage class in atomic insts. (#6456)Yong He2025-02-26
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* Legalize array size of SV_TessFactor and SV_InsideTessFactor (#6409)Jay Kwak2025-02-24
| | | | | | | | | | | | | | | | | | | | | | | | | | * Legalize array size of SV_TessFactor and SV_InsideTessFactor When targeting SPIR-V or GLSL, the type for SV_TessFactor must be float[4]; note that it is not a vector but an array. Similarly the type of SV_InsideTessFactor has to be an array of float[2]. When the user shader declare them as arrays smaller than the required size, Slang will legalize them to the required sizes. Note that it is not the user mistake to declare floar[3] when the hull mode is in "tri", as an example. The unused components are expected to be ignored. Note also that HLSL allows the type to be float[2|3|4] whereas GLSL and SPIR-V requires it to be always float[4]. * Change from "quad" domain mode to "tri" * Handle error case --------- Co-authored-by: Yong He <yonghe@outlook.com>
* Force inline functions that takes InputPatch and OutputPatch (#6407)Jay Kwak2025-02-19
| | | | | | This commit inlines functions that takes InputPatch and OutputPatch as the function parameter. Co-authored-by: Yong He <yonghe@outlook.com>
* Emit missing atomic64 capability, fix int-typed builtin used in both vs and ↵Yong He2025-02-11
| | | | | fs. (#6314) Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Support stage_switch. (#6311)Yong He2025-02-06
| | | | | | | | | * Support stage_switch. * Update proposal status. * Fix gl_InstanceID. * Fix.
* Feature/initialize list side branch (#6058)kaizhangNV2025-02-05
| | | | | | | | | | | | | | | | | | | | | | * SP004: implement initialize list translation to ctor - We synthesize a member-wise constructor for each struct follow the rules described in SP004. - Add logic to translate the initialize list to constructor invoke - Add cuda-host decoration for the synthesized constructor - Remove the default constructor when we have a valid member init constructor - Disable -zero-initialize option, will re-implement it in followup (#6109). - Fix the overload lookup issue When creating invoke expression for ctor, we need to call ResolveInvoke() to find us the best candidates, however the existing lookup logic could find us the base constructor for child struct, we should eliminate this case by providing the LookupOptions::IgnoreInheritance to lookup, this requires us to create a subcontext on SemanticsVisitor to indicate that we only want to use this option on looking the constructor. - Do not implicit initialize a struct that doesn't have explicit default constructor. Co-authored-by: slangbot <186143334+slangbot@users.noreply.github.com>
* Auto enable `-fvk-use-entrypoint-name` when there is more than one ↵Yong He2025-02-03
| | | | | | | entrypoint. (#6260) * Auto enable `-fvk-use-entrypoint-name` when there is more than one entrypoint. * Fix.
* Declare `VariablePointers` capability when needed. (#6231)Yong He2025-01-30
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* Update SPIRV submodules and fix tests (#6222)Jay Kwak2025-01-29
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* Add groupshared atomic array test. (#6107)Yong He2025-01-17
| | | | | * Add groupshared atomic array test. * Fix test.
* Fix `-capability` arg in SPIRV debug command line output. (#6114)Yong He2025-01-17
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* Implement specialization constant support in numthreads / local_size (#5963)Julius Ikkala2025-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Allow using specialization constants in numthreads attribute * Add support for GLSL local_size_x_id syntax * Fix overeager specialization constant parsing * Add diagnostics for specialization constant numthreads * Remove unused variable * Fix local_size_x_id not finding existing specialization constant * Allow materializeGetWorkGroupSize to reference specialization constants * Use SpvOpExecutionModeId for modes that require it * Cleanup specialization constant numthreads code * Add tests for specialization constant work group sizes * Fix implicit Slang::Int -> int32_t cast * Fix querying thread group size in reflection API --------- Co-authored-by: Yong He <yonghe@outlook.com>
* Add SampleCmpLevel intrinsics (#6004)Darren Wihandi2025-01-08
| | | | | | | | | | | | | | | | | | | * add SampleCmpLevel intrinsics * update tests * fix typo * fix broken glsl test * refactor SampleCmpLevelZero * fix metallib test * fix broken test on dx12 --------- Co-authored-by: Yong He <yonghe@outlook.com>
* Lower varying parameters as pointers instead of SSA values. (#5919)Yong He2025-01-07
| | | | | * Add executable test on matrix-typed vertex input. * Fix emit logic of matrix layout qualifier. * Pass fragment shader varying input by constref to allow EvaluateAttributeAtCentroid etc. to be implemented correctly.
* Add `RaytracingAccelerationStructure::__init(uint64_t)`. (#5967)Yong He2024-12-30
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* Report error when generated spirv is empty. (#5899)Yong He2024-12-19
| | | | | | | | | | * Report error when generated spirv is empty. * format code --------- Co-authored-by: slangbot <186143334+slangbot@users.noreply.github.com> Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Allow `Optional`, `Tuple` and `bool` to be used in varying input/output. (#5889)Yong He2024-12-18
| | | | | | | | | | | | | | | | | | | | | | | * Allow `Optional` and `Tuple` to be used in varying input/output. * Fix. * format code * Fix. * Fix test. * Fix. * enhance test. * Fix. * format code --------- Co-authored-by: slangbot <186143334+slangbot@users.noreply.github.com>
* Add verification logic on push and specialization constants. (#5887)Yong He2024-12-17
| | | | | | | | | * Add verification logic on push and specialization constants. * format code --------- Co-authored-by: slangbot <186143334+slangbot@users.noreply.github.com>
* Add SV_DrawIndex. (#5787)Yong He2024-12-09
| | | Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Allow pointers to existential values. (#5793)Yong He2024-12-09
| | | | | | | | | | | | | | | | | | | * Fix pointer offset logic and add executable tests. * Fix. * Fix test. * Add existential ptr test. * Allow pointers to existential values. * Fix. * Fix. --------- Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Add Sampler*Shadow type aliases. (#5789)Yong He2024-12-09
| | | Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Support specialization constant on WGSL and Metal. (#5780)Yong He2024-12-06
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* Make fvk-invert-y work on mesh shader ouptuts. (#5760)Yong He2024-12-05
| | | Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Add intrinsics for aligned load/store. (#5736)Yong He2024-12-03
| | | | | | | | | | | | | | | * Add intrinsics for aligned load/store. * Fix. * Update comment. * Implement aligned load/store as intrinsic_op. * Fix. * Add proposal doc. * fix typo.
* Emit OpExecutionMode SpacingEqual for Domain stage (#5696)Jay Kwak2024-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Domain stage should emit one more `OpExecutionMode` with `SpacingEqual`, similary to how Hull stage does. Currently Hull stage emits four OpExecutionMode as following: OpExecutionMode %hullMain SpacingEqual OpExecutionMode %hullMain OutputVertices 4 OpExecutionMode %hullMain VertexOrderCw OpExecutionMode %hullMain Quads And Domain stage emits only one OpExecutionMode: OpExecutionMode %domainMain Quads This commit adds the following instruction for Domain stage: OpExecutionMode %domainMain SpacingEqual It is because the Vulkan Validation Layer prints error when the Domain shader didn't have `OpeExecutionMode SpacingEqual`. `SpacingEqual` corresponds to an attribute, `[partitioning("integer")]`, given to the Hull stage. Although Domain stage is not marked with same attribute, it is assumed to use the same value used for matching Hull Stage. The error message from VVL is following: ``` vkCreateShadersEXT(): pCreateInfos[2].stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT, but spacing is not specified. The Vulkan spec states: If codeType is VK_SHADER_CODE_TYPE_SPIRV_EXT, and stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT, pCode must contain an OpExecutionMode instruction specifying the spacing of segments on the edges of tessellated primitives (https://vulkan.lunarg.com/doc/view/1.3.283.0/windows/1.3-extensions/vkspec.html#VUID-VkShaderCreateInfoEXT-codeType-08874) ``` Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Add datalayout for constant buffers. (#5608)Yong He2024-11-21
| | | | | | | | | | | | | | | | | | | * Add datalayout for constant buffers. * Fixes. * Fix test. * Fix glsl codegen. * Update spirv-specific doc. * Fix test. * Fix binding in the presense of specialization constants. * address comments. * Add a test for constant buffer layout.
* Fix specialization constant miscompile in glsl mode. (#5568)Yong He2024-11-19
| | | Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Push buffer load to end of access chain. (#5544)Yong He2024-11-12
| | | | | | | | | | | | | | | * Push buffer load to end of access chain. * Update test. * Fix. * Fix. * Fix. * Make more robust. * Fix.
* Add `InterlockedAddF64` intrinsic. (#5412)Yong He2024-10-27
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* Use DebugDeclare instead of DebugValue. (#5404)Yong He2024-10-24
| | | | | | | | | | | | | * Use DebugDeclare instead of DebugValue. * Avoid generating illegal SPIRV. * Improve DebugLine output. * Fix. * Fix. * Misc improvements.
* Fix spirv codegen for pointer to empty structs. (#5355)Yong He2024-10-21
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* Remove use of Variable Pointer capability. (#5352)Yong He2024-10-19
| | | * Remove use of Variable Pointer capability.
* Cleanup definition of `printf`. (#5330)Yong He2024-10-17
| | | | | | | | | | | * Cleanup definition of `printf`. * Fix. * Fix spirv generation. * Fix. * enhance test.
* Cleanup atomic intrinsics. (#5324)Yong He2024-10-17
| | | | | | | | | | | | | | | | | | | * Cleanup atomic intrinsics. * Fix. * Fix glsl. * Remove hacky intrinsic expansion logic for glsl image atomics. * Fix all tests. * Fix. * Add `InterlockedAddF16Emulated`. * Fix glsl intrinsic. * Fix.
* Fix spirv debug info for pointer types. (#5319)Yong He2024-10-16
| | | | | * Fix spirv debug info for pointer types. * fix comment.
* Fix spirv lowering logic around pointer to unsized array. (#5243)Yong He2024-10-09
| | | | | | | | | * Fix spirv lowering logic around pointer to unsized array. * Fix. --------- Co-authored-by: Ellie Hermaszewska <ellieh@nvidia.com>
* Fix hull shader spirv legalization bug. (#5180)Yong He2024-09-27
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* Fix spirv emit for global pointer variable. (#5009)Yong He2024-09-05
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* Support specialization constants. (#4963)Yong He2024-08-30
| | | | | | | | | | | | | | | | | | | | | * Support specialization constants. * Fix. * Fix. * Fix. * Fix. * Make sure specialization constants have names. * Clean up and support the dxc [vk::constant_id] syntax. * Fix. * Fix. * Fix.
* Implement `-fvk-use-dx-layout` (#4912)ArielG-NV2024-08-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Implement `-fvk-use-dx-layout` Fixes: #4126 Changes: * Added fvk-use-dx-layout * Modified `HLSLConstantBufferLayoutRulesImpl` for correctness (ex: Array is always 16 byte aligned) * Added kFXCShaderResourceLayoutRulesFamilyImpl and kFXCConstantBufferLayoutRulesFamilyImpl to handle fvk-use-dx-layout * Added `ConstantBufferLayoutRules` to manage constant buffer rules * Added `alignCompositeElementOfNonAggregate`/`alignCompositeElementOfAggregate` to handle forced alignment of composites for ConstantBuffers * `StructuredBuffer` rules are mostly equal to `scalar` layout, not much was needed to be changed to support this behavior. * seperate legacy constant buffer and how Slang does constant-buffer normally * undo an addition * remove accidental test * Address review and fix Address review and remove GLSL support since GLSL requires a seperate legalization (need to linearlize structs like with `legalizeMetalIR` to assign explicit offsets) * comments * remove aggregate and non-aggregate logic We don't need this distinction for the logic --------- Co-authored-by: Yong He <yonghe@outlook.com>
* Move SPIRV global variables into a context variable (#4741)ArielG-NV2024-07-30
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* Fix SPIRV emit for small-integer texture types. (#4753)Yong He2024-07-30
| | | | | * Fix SPIRV emit for small-integer texture types. * Disable -emit-spirv-via-glsl test.
* Overhaul IR lowering of pointer types. (#4710)Yong He2024-07-25
| | | | | | | | | | | | | | | * Overhaul IR lowering of pointer types. * Propagate address space in IRBuilder. * Fixup. * Fix. * Fix. * Change how Ptr type is printed to text. * Fix.
* Support OpDebugTypePointer for struct member pointer (#4527)Jay Kwak2024-07-18
| | | | | | | | This change supports OpDebugTypePointer for a member variable whose type is a pointer type for the outer struct that hasn't been declared yet. It is done with new extension, "SPV_KHR_relaxed_extended_instruction", that comes with a new instruction, "OpExtInstWithForwardRefs". Closes #4304
* Specialize address space during spirv legalization. (#4600)Yong He2024-07-10
| | | | | | | | | | | * Specialize address space during spirv legalization. * Fix. * Fix building doc. * Fix cmake. * Update assert.
* Supply SPIRV capability for textureQueryLod (#4522)venkataram-nv2024-07-01
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