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-rw-r--r--docs/language-reference/04-types.md4
-rw-r--r--docs/target-compatibility.md16
2 files changed, 17 insertions, 3 deletions
diff --git a/docs/language-reference/04-types.md b/docs/language-reference/04-types.md
index e7344793c..d62af1763 100644
--- a/docs/language-reference/04-types.md
+++ b/docs/language-reference/04-types.md
@@ -43,7 +43,7 @@ All signed integers used two's complement representation.
All arithmetic operations on integers (both signed and unsigned) wrap on overflow/underflow.
All target platforms must support the `int` and `uint` types.
-Specific target platforms may not support the other integer types.
+Specific [target platforms](../target-compatibility.md) may not support the other integer types.
All integer types are stored in memory with their natural size and alignment on all targets that support them.
@@ -61,7 +61,7 @@ All floating-point types are laid out in memory using the matching IEEE 754 stan
Target platforms may define their own rules for rounding, precision, denormals, infinities, and not-a-number values.
All target platforms must support the `float` type.
-Specific targets may not support the other floating-point types.
+Specific [targets](../target-compatibility.md) may not support the other floating-point types.
All floating-point types are stored in memory with their natural size and alignment on all targets that support them.
diff --git a/docs/target-compatibility.md b/docs/target-compatibility.md
index 6fda4ceed..08819ac17 100644
--- a/docs/target-compatibility.md
+++ b/docs/target-compatibility.md
@@ -9,9 +9,11 @@ Items with ^ means there is some discussion about support later in the document
| Feature | D3D11 | D3D12 | VK | CUDA | CPU
|-----------------------------|--------------|--------------|------------|---------------|---------------
-| Half Type | No | Yes | Yes | Yes ^ | No +
+| Half Type | No | Yes ^ | Yes | Yes ^ | No +
| Double Type | Yes | Yes | Yes | Yes | Yes
| Double Intrinsics | No | Limited + | Limited | Most | Yes
+| u/int8_t Type | No | No | Yes ^ | Yes | Yes
+| u/int16_t Type | No | Yes ^ | Yes ^ | Yes | Yes
| u/int64_t Type | No | Yes ^ | Yes | Yes | Yes
| u/int64_t Intrinsics | No | No | Yes | Yes | Yes
| int matrix | Yes | Yes | No + | Yes | Yes
@@ -47,6 +49,18 @@ There appears to be a problem writing to a StructuredBuffer containing half on D
In order for half to work in CUDA, NVRTC must be able to include `cuda_fp16.h` and related files. Please read the [CUDA target documentation](cuda-target.md) for more details.
+## u/int8_t Type
+
+Not currently supported in D3D11/D3D12 because not supported in HLSL/DXIL/DXBC.
+
+Supported in Vulkan via the extensions `GL_EXT_shader_explicit_arithmetic_types` and `GL_EXT_shader_8bit_storage`.
+
+## u/int16_t Type
+
+Requires SM6.2 which requires DXIL and therefore DXC and D3D12. For DXC this is discussed [here](https://github.com/Microsoft/DirectXShaderCompiler/wiki/16-Bit-Scalar-Types).
+
+Supported in Vulkan via the extensions `GL_EXT_shader_explicit_arithmetic_types` and `GL_EXT_shader_16bit_storage`.
+
## u/int64_t Type
Requires SM6.0 which requires DXIL for D3D12. Therefore not available with DXBC on D3D11 or D3D12.