diff options
| author | venkataram-nv <vedavamadath@nvidia.com> | 2024-06-27 16:09:33 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-27 16:09:33 -0700 |
| commit | f5acb6b987609cc6c1d859120cd327c57c344803 (patch) | |
| tree | 8ea688558434fae58f080e7a5e67c11c04235bcb /tests | |
| parent | 8172751f2a27d00ed39b32ba2f2b3fb13f8223ef (diff) | |
Extend `countbits` intrinsic for vector types (#4499)
* Extend `countbits` intrinsic for vector types
This commit implements the overloading function for `countbits` function.
Because HLSL has following overloadings,
```
uint count_bits(uint value);
uint2 count_bits(uint2 value);
uint3 count_bits(uint3 value);
uint4 count_bits(uint4 value);
```
https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/countbits
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/hlsl-intrinsic/countbits.slang | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/tests/hlsl-intrinsic/countbits.slang b/tests/hlsl-intrinsic/countbits.slang new file mode 100644 index 000000000..da6828e87 --- /dev/null +++ b/tests/hlsl-intrinsic/countbits.slang @@ -0,0 +1,27 @@ +//TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -compute -cpu +//TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -compute -dx11 +//TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -compute -dx12 +//TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -vk -compute +//DISABLE_TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -cuda -compute +//TEST(compute):COMPARE_COMPUTE_EX(filecheck-buffer=CHK):-slang -mtl -compute + +//CHK:1 + +//TEST_INPUT:ubuffer(data=[0], stride=4):out,name=outputBuffer +RWStructuredBuffer<int> outputBuffer; + +[numthreads(1, 1, 1)] +void computeMain(uint3 dispatchThreadID : SV_DispatchThreadID) +{ + uint r1 = countbits(0b1); + uint2 r2 = countbits(uint2(0b0, 0b1)); + uint3 r3 = countbits(uint3(0b0, 0b1, 0b11)); + uint4 r4 = countbits(uint4(0b0, 0b1, 0b11, 0b111)); + + outputBuffer[0] = true + && (r1 == 1) + && (r2.x == 0 && r2.y == 1) + && (r3.x == 0 && r3.y == 1 && r3.z == 2) + && (r4.x == 0 && r4.y == 1 && r4.z == 2 && r4.w == 3) + ; +} |
