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authorsriramm-nv <85252063+sriramm-nv@users.noreply.github.com>2024-04-16 23:59:41 -0700
committerGitHub <noreply@github.com>2024-04-16 23:59:41 -0700
commit4b3f554a58e4224806c31d66874fbe60f1f09332 (patch)
treeac19836249c875f2b8e3cdd74894a17d963ef1fd /tests
parent67313584d6879d68db53ced3108c2370bed5e8c1 (diff)
Force Inline all the InterlockedAdd functions in stdlib (#3965)
This change forcibly inlines the InterlockedAdd functions when using byteAddress buffer. The IR generated when using nonUniformResourceInst on RWByteAddressBuffer: buffer[NonUniformResourceIndex(uint(0))].InterlockedAdd(0, 1); follows the sequence of a call into an index lookup that is wrapped by a nonuniformResourceIndex: %ld = nonUniformResourceIndex(0) Call RWStructBufferInterlockedAdd(%ld, 0, 1) This prevents NonUniformResource decoration of the buffer because it is wrapped by the function call to InterlockedAdd, that further expands to: %gep = getElement(%buffer, 0) SpirvAsmInst(..., rwStructuredBufferGEP(%gep, 0), ...) By Force-Inlining the atomic functions, the buffer / resource is made visible to the nonUniformResourceIndex inst, allowing the decoration. Identified while debugging tests/spirv/coherent-2.slang
Diffstat (limited to 'tests')
-rw-r--r--tests/slang-extension/atomic-float-byte-address-buffer-cross.slang12
1 files changed, 11 insertions, 1 deletions
diff --git a/tests/slang-extension/atomic-float-byte-address-buffer-cross.slang b/tests/slang-extension/atomic-float-byte-address-buffer-cross.slang
index ffa6d5b94..523c58984 100644
--- a/tests/slang-extension/atomic-float-byte-address-buffer-cross.slang
+++ b/tests/slang-extension/atomic-float-byte-address-buffer-cross.slang
@@ -1,6 +1,6 @@
// atomic-float-byte-address-buffer-cross.slang
-//TEST:CROSS_COMPILE: -profile cs_6_5 -entry computeMain -target spirv-assembly
+//TEST:SIMPLE(filecheck=CHECK): -profile cs_6_5 -entry computeMain -target spirv-assembly
// We can't do this test, because it relies on nvAPI
//DISABLE_TEST:CROSS_COMPILE: -profile cs_6_5 -entry computeMain -target dxil
@@ -13,6 +13,16 @@ RWStructuredBuffer<float> anotherBuffer;
[numthreads(16, 1, 1)]
void computeMain(uint3 dispatchThreadID : SV_DispatchThreadID)
{
+ // CHECK-DAG: OpDecorate %[[V1:[a-zA-Z0-9_]+]] Binding 1
+ // CHECK-DAG: OpDecorate %[[V2:[a-zA-Z0-9_]+]] Binding 0
+ // CHECK-DAG: %[[P1:[a-zA-Z0-9_]+]] = OpTypePointer Uniform %float
+ // CHECK-DAG: %[[P2:[a-zA-Z0-9_]+]] = OpTypePointer Input %uint
+ // CHECK: OpAccessChain %[[P2]]
+ // CHECK: OpAccessChain %[[P1]] %[[V1]]
+ // CHECK: OpAccessChain %[[P1]] %[[V2]]
+ // CHECK: OpAtomicFAddEXT
+ // CHECK: OpAccessChain %[[P1]] %[[V2]]
+ // CHECK: OpAtomicFAddEXT
uint tid = dispatchThreadID.x;
int idx = int((tid & 3) ^ (tid >> 2));