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| author | Tim Foley <tfoley@nvidia.com> | 2017-11-07 10:09:16 -0800 |
|---|---|---|
| committer | Tim Foley <tfoley@nvidia.com> | 2017-11-07 10:58:59 -0800 |
| commit | ed29b2994e99e0531488a0d46ff82348b62b070e (patch) | |
| tree | 5ed2497d156efa973f210306ecfe97eb9bdb97b1 /tests/ir/loop.slang.expected | |
| parent | f4c4f63c0cfad93b1eacf9300eb8e06d2c78ccc9 (diff) | |
Fix expected output for loop test now that barrier isn't an intrinsic
The test case had previously been calling `GroupBarrierWithGroupSync` as if it was a special-cased instruction, but now it is just calling it as an ordinary (intrinsic) function.
I haven't removed the now-useless instruction, but it would be a good cleanup to go through and eliminate all the instruction cases we aren't using in the near future.
Diffstat (limited to 'tests/ir/loop.slang.expected')
| -rw-r--r-- | tests/ir/loop.slang.expected | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/tests/ir/loop.slang.expected b/tests/ir/loop.slang.expected index 212ce1913..d3057ca2c 100644 --- a/tests/ir/loop.slang.expected +++ b/tests/ir/loop.slang.expected @@ -5,6 +5,8 @@ ir_global_var @_SV01s : Ptr<@ThreadGroup vector<float,4>[64]>; ir_global_var @_SV05input : Ptr<StructuredBuffer<vector<float,4>>>; +ir_func @_S031GroupMemoryBarrierWithGroupSyncp0V : () -> void; + ir_global_var @_SV06output : Ptr<RWStructuredBuffer<vector<float,4>>>; ir_func @_S04mainp3uuuV : (uint, uint, uint) -> void @@ -37,7 +39,7 @@ block %15: loopTest(%20, %21, %16) block %21: - GroupMemoryBarrierWithGroupSync() + call(@_S031GroupMemoryBarrierWithGroupSyncp0V) let %22 : uint = load(%6) let %23 : Ptr<vector<float,4>> = getElementPtr(@_SV01s, %22) let %24 : Ptr<vector<float,4>> = var() @@ -68,7 +70,7 @@ block %17: unconditionalBranch(%15) block %16: - GroupMemoryBarrierWithGroupSync() + call(@_S031GroupMemoryBarrierWithGroupSyncp0V) let %40 : RWStructuredBuffer<vector<float,4>> = load(@_SV06output) let %41 : uint = load(%5) let %42 : Ptr<vector<float,4>> = getElementPtr(@_SV01s, 0) |