Add Mesh and Task shader support to GFX (#3190)

* Bump vulkan headers

Also just use vulkan-headers as a submodule

* Add drawMeshTasks to gfx graphics pipelines

* Add DispatchMesh overload with no payload, with GLSL intrinsic

* Require spirv 1.4 for mesh shaders

* Add vulkan mesh shader feature discovery

* Add mesh shader stage bits to vk-util

* Add mesh and task shader support to render-test

* Add mesh and task tests

* Preserve "payload" specifier in task shaders

* Add mesh shader pipeline support to gfx

* Add TODO

* Add numThreads attribute for amplification stage

* Add payload to task shader test

* Drop dependency on d3dx12

* Allow passing payloads from task to mesh shaders

* regenerate vs projects

* check DispatchMesh name correctly

* Add mesh shader tests to failing tests

* Detect wave-ops feature on vulkan

* Add fuse-product to expected failures

This fails because the global varaible `count` is not initialized

* Add required extension to WaveMaskMatch SPIR-V impl

* Remove meshShader member from pipeline desc

* Identify mesh shader support on d3d12

1 files changed, 29 insertions, 7 deletions

diff --git a/source/slang/hlsl.meta.slang b/source/slang/hlsl.meta.slang
index c670f234e..752c99a5b 100644
--- a/source/slang/hlsl.meta.slang
+++ b/source/slang/hlsl.meta.slang
@@ -5948,9 +5948,8 @@ matrix<T,N,M> WaveMaskReadLaneFirst(WaveMask mask, matrix<T,N,M> expr);
 
 __generic<T : __BuiltinType>
 __glsl_extension(GL_NV_shader_subgroup_partitioned)
-__spirv_version(1.3)
+__spirv_version(1.1)
 __cuda_sm_version(7.0)
-__spirv_capability(GroupNonUniformPartitionedNV)
 WaveMask WaveMaskMatch(WaveMask mask, T value)
 {
     __target_switch
@@ -5959,14 +5958,18 @@ WaveMask WaveMaskMatch(WaveMask mask, T value)
     case cuda: __intrinsic_asm "_waveMatchScalar($0, $1).x";
     case hlsl: __intrinsic_asm "WaveMatch($1).x";
     case spirv:
-        return (spirv_asm {OpGroupNonUniformPartitionNV $$uint4 result $value}).x;
+        return (spirv_asm
+        {
+            OpCapability GroupNonUniformPartitionedNV;
+            OpExtension "SPV_NV_shader_subgroup_partitioned";
+            OpGroupNonUniformPartitionNV $$uint4 result $value
+        }).x;
     }
 }
 __generic<T : __BuiltinType, let N : int>
 __glsl_extension(GL_NV_shader_subgroup_partitioned)
-__spirv_version(1.3)
+__spirv_version(1.1)
 __cuda_sm_version(7.0)
-__spirv_capability(GroupNonUniformPartitionedNV)
 WaveMask WaveMaskMatch(WaveMask mask, vector<T,N> value)
 {
     __target_switch
@@ -5975,7 +5978,12 @@ WaveMask WaveMaskMatch(WaveMask mask, vector<T,N> value)
     case cuda: __intrinsic_asm "_waveMatchMultiple($0, $1).x";
     case hlsl: __intrinsic_asm "WaveMatch($1).x";
     case spirv:
-        return (spirv_asm {OpGroupNonUniformPartitionNV $$uint4 result $value}).x;
+        return (spirv_asm
+        {
+            OpCapability GroupNonUniformPartitionedNV;
+            OpExtension "SPV_NV_shader_subgroup_partitioned";
+            OpGroupNonUniformPartitionNV $$uint4 result $value
+        }).x;
     }
 }
 
@@ -7524,7 +7532,21 @@ void SetMeshOutputCounts(uint vertexCount, uint primitiveCount);
 // Specify the number of downstream mesh shader thread groups to invoke from an amplification shader,
 // and provide the values for per-mesh payload parameters.
 //
-void DispatchMesh<P>(uint threadGroupCountX, uint threadGroupCountY, uint threadGroupCountZ, P meshPayload);
+// This function doesn't return.
+//
+[KnownBuiltin("DispatchMesh")]
+void DispatchMesh<P>(uint threadGroupCountX, uint threadGroupCountY, uint threadGroupCountZ, __ref P meshPayload)
+{
+    __target_switch
+    {
+    case hlsl:
+        __intrinsic_asm "DispatchMesh";
+    case glsl:
+        // This intrinsic doesn't take into account writing meshPayload. That
+        // is dealt with separately by 'legalizeDispatchMeshPayloadForGLSL'.
+        __intrinsic_asm "EmitMeshTasksEXT($0, $1, $2)";
+    }
+}
 
 //
 // "Sampler feedback" types `FeedbackTexture2D` and `FeedbackTexture2DArray`.