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| author | Harsh Aggarwal (NVIDIA) <haaggarwal@nvidia.com> | 2025-09-04 10:58:02 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-04 05:28:02 +0000 |
| commit | 5ec41675d817f82a7ce3c4d79c68548db0bd4227 (patch) | |
| tree | 57abff17713b5d9ea876be29e3b451c9abe8c49d /.github/actions | |
| parent | b45706b3f532f85525de5746f1f607ba2e57fc88 (diff) | |
Enable CUDA support for additional HLSL intrinsic tests (#8293)
Enable CUDA support for additional HLSL intrinsic tests by implementing
missing functionality and fixing compiler bugs affecting CUDA targets.
- Fix critical bug in InterlockedCompareStore64 where division used /4
instead of /8 for 64-bit types, causing incorrect memory addressing for
all signed int 64_t atomics
- Add signed int64_t atomic wrappers (atomicExch, atomicCAS) to CUDA
prelu de that properly cast to/from unsigned types as required by CUDA's
atomic API
- Enable tests: atomic-intrinsics-64bit.slang
- Implement CUDA support for QuadAny and QuadAll operations using warp
shu ffle primitives (__shfl_sync with quad-level lane masking)
- Add CUDA to quad_control capability definition in
slang-capabilities.capdef
- Add _slang_quadAny/_slang_quadAll helper functions to CUDA prelude
- Enable tests: quad-control-comp-functionality.slang,
subgroup-quad.slang
---------
Co-authored-by: szihs <675653+szihs@users.noreply.github.com>
Diffstat (limited to '.github/actions')
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