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authorKonstantin <const@const.me>2023-01-24 17:40:50 +0100
committerKonstantin <const@const.me>2023-01-24 17:40:50 +0100
commite78815de53005336c3746bcd85c2e789a43f1b94 (patch)
tree5fe25b6d4024bbcca7402ebcc28910417c54758d
parent9d6fb00973218ebc397e15819be3964423b81f91 (diff)
Performance tuning on AMD iGPU
-rw-r--r--ComputeShaders/ComputeShaders.vcxproj2
-rw-r--r--ComputeShaders/ComputeShaders.vcxproj.filters2
-rw-r--r--ComputeShaders/mulMatByRowTiled64.hlsl4
-rw-r--r--ComputeShaders/mulMatByRowTiledEx.hlsl2
-rw-r--r--ComputeShaders/mulMatTiled64.hlsl3
-rw-r--r--ComputeShaders/mulMatTiledEx.hlsl2
-rw-r--r--Whisper/ML/MlContext.cpp31
7 files changed, 8 insertions, 38 deletions
diff --git a/ComputeShaders/ComputeShaders.vcxproj b/ComputeShaders/ComputeShaders.vcxproj
index 300974a..b79f550 100644
--- a/ComputeShaders/ComputeShaders.vcxproj
+++ b/ComputeShaders/ComputeShaders.vcxproj
@@ -184,14 +184,12 @@
<FxCompile Include="mulMatByRow.hlsl" />
<FxCompile Include="mulMatByRow64.hlsl" />
<FxCompile Include="mulMatByRowTiled.hlsl" />
- <FxCompile Include="mulMatByRowTiled64.hlsl" />
<FxCompile Include="mulMatByRowTiledEx.hlsl" />
<FxCompile Include="mulMatByScalar.hlsl" />
<FxCompile Include="mulMatDotMain.hlsl" />
<FxCompile Include="mulMatDotReshape.hlsl" />
<FxCompile Include="mulMatMadMain.hlsl" />
<FxCompile Include="mulMatTiled.hlsl" />
- <FxCompile Include="mulMatTiled64.hlsl" />
<FxCompile Include="mulMatTiledEx.hlsl" />
<FxCompile Include="norm.hlsl" />
<FxCompile Include="normCompat.hlsl" />
diff --git a/ComputeShaders/ComputeShaders.vcxproj.filters b/ComputeShaders/ComputeShaders.vcxproj.filters
index de9f12f..fbf30d6 100644
--- a/ComputeShaders/ComputeShaders.vcxproj.filters
+++ b/ComputeShaders/ComputeShaders.vcxproj.filters
@@ -43,9 +43,7 @@
<FxCompile Include="normFixed64.hlsl" />
<FxCompile Include="mulMatByRowTiled.hlsl" />
<FxCompile Include="convolutionMain2Fixed.hlsl" />
- <FxCompile Include="mulMatByRowTiled64.hlsl" />
<FxCompile Include="addRows.hlsl" />
- <FxCompile Include="mulMatTiled64.hlsl" />
<FxCompile Include="zeroMemory.hlsl" />
<FxCompile Include="mulMatTiledEx.hlsl" />
<FxCompile Include="matReshapePanels.hlsl" />
diff --git a/ComputeShaders/mulMatByRowTiled64.hlsl b/ComputeShaders/mulMatByRowTiled64.hlsl
deleted file mode 100644
index 6c63f2d..0000000
--- a/ComputeShaders/mulMatByRowTiled64.hlsl
+++ /dev/null
@@ -1,4 +0,0 @@
-#define THREADS_Y 32
-#define THREADS_X 32
-#define TILE_Y 128
-#include "mulMatByRowTiled.hlsl" \ No newline at end of file
diff --git a/ComputeShaders/mulMatByRowTiledEx.hlsl b/ComputeShaders/mulMatByRowTiledEx.hlsl
index bc0c0c6..d286ec2 100644
--- a/ComputeShaders/mulMatByRowTiledEx.hlsl
+++ b/ComputeShaders/mulMatByRowTiledEx.hlsl
@@ -3,7 +3,7 @@
static const uint TILE_SIZE = 32;
#endif
#ifndef THREADS_Y
-static const uint THREADS_Y = 16;
+static const uint THREADS_Y = 8;
#endif
// First tensor, reshaped into dense column major horizontal panels of size [ width, TILE_SIZE ]
diff --git a/ComputeShaders/mulMatTiled64.hlsl b/ComputeShaders/mulMatTiled64.hlsl
deleted file mode 100644
index 45d77b1..0000000
--- a/ComputeShaders/mulMatTiled64.hlsl
+++ /dev/null
@@ -1,3 +0,0 @@
-#define TILE_SIZE 64
-#define STREAM_SECOND_MATRIX 1
-#include "mulMatTiled.hlsl" \ No newline at end of file
diff --git a/ComputeShaders/mulMatTiledEx.hlsl b/ComputeShaders/mulMatTiledEx.hlsl
index e6d6940..c59e3ea 100644
--- a/ComputeShaders/mulMatTiledEx.hlsl
+++ b/ComputeShaders/mulMatTiledEx.hlsl
@@ -6,7 +6,7 @@
static const uint TILE_SIZE = 32;
#endif
#ifndef TILE_HEIGHT
-static const uint TILE_HEIGHT = 32;
+static const uint TILE_HEIGHT = 64;
#endif
#ifndef THREADS_Y
static const uint THREADS_Y = 8;
diff --git a/Whisper/ML/MlContext.cpp b/Whisper/ML/MlContext.cpp
index a226999..9e625a7 100644
--- a/Whisper/ML/MlContext.cpp
+++ b/Whisper/ML/MlContext.cpp
@@ -117,17 +117,8 @@ void MlContext::mulMatTiled( const Tensor& a, const Tensor& b, Tensor& res )
else
{
bindShader( eComputeShader::mulMatByRowTiled );
- uint32_t groupsX;
- if( gpuInfo.wave64() )
- {
- constexpr uint32_t TILE_Y = 128;
- groupsX = ( a.ne[ 1 ] + TILE_Y - 1 ) / TILE_Y;
- }
- else
- {
- constexpr uint32_t TILE_Y = 64;
- groupsX = ( a.ne[ 1 ] + TILE_Y - 1 ) / TILE_Y;
- }
+ constexpr uint32_t TILE_Y = 64;
+ const uint32_t groupsX = ( a.ne[ 1 ] + TILE_Y - 1 ) / TILE_Y;
context()->Dispatch( groupsX, a.ne[ 2 ], a.ne[ 3 ] );
}
}
@@ -146,20 +137,10 @@ void MlContext::mulMatTiled( const Tensor& a, const Tensor& b, Tensor& res )
// Dispatching one thread group for each tile of the output matrix.
bindShader( eComputeShader::mulMatTiled );
- uint32_t x, y;
- // These compute shaders correctly handle partial tiles on the right and bottom edges of the output matrix, that's why rounding up.
- if( gpuInfo.wave64() )
- {
- constexpr uint32_t TILE_SIZE = 64;
- x = ( res.ne[ 0 ] + TILE_SIZE - 1 ) / TILE_SIZE;
- y = ( res.ne[ 1 ] + TILE_SIZE - 1 ) / TILE_SIZE;
- }
- else
- {
- constexpr uint32_t TILE_SIZE = 32;
- x = ( res.ne[ 0 ] + TILE_SIZE - 1 ) / TILE_SIZE;
- y = ( res.ne[ 1 ] + TILE_SIZE - 1 ) / TILE_SIZE;
- }
+ // These compute shaders correctly handle partial tiles on the right and bottom edges of the output matrix, that's why rounding up
+ constexpr uint32_t TILE_SIZE = 32;
+ const uint32_t x = ( res.ne[ 0 ] + TILE_SIZE - 1 ) / TILE_SIZE;
+ const uint32_t y = ( res.ne[ 1 ] + TILE_SIZE - 1 ) / TILE_SIZE;
const uint32_t z = res.ne[ 2 ] * res.ne[ 3 ];
context()->Dispatch( x, y, z );