From f59e0ef409844f2514435a8df8ceeff3663e5db3 Mon Sep 17 00:00:00 2001
From: Mukund Keshava <mkeshava@nvidia.com>
Date: Tue, 11 Mar 2025 21:40:05 +0530
Subject: IR: Add SPIR-V disassembly for embedded downstream IR dumps (#6529)

* IR: Add SPIR-V disassembly for embedded downstream IR dumps

When dumping IR that contains embedded downstream SPIR-V code (via
EmbeddedDownstreamIR instructions), display the disassembled SPIR-V
instead of just showing "<binary blob>".

This CL also does:
- Adds a new interface for disassembly and get result.
- Modify export-library-generics.slang test test to check for the
  disassembled SPIR-V

Fixes #6513

* Add module-dual-target-verify test

Fixes #6517
Adds a new test to verify that dxil and spirv targets are stored
separately in the precompiled blob.

* Fix review comments from cheneym2

* format code

---------

Co-authored-by: slangbot <186143334+slangbot@users.noreply.github.com>
---
 tests/modules/multi-target-module.slang | 45 +++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 tests/modules/multi-target-module.slang

(limited to 'tests/modules/multi-target-module.slang')

diff --git a/tests/modules/multi-target-module.slang b/tests/modules/multi-target-module.slang
new file mode 100644
index 000000000..68b774b87
--- /dev/null
+++ b/tests/modules/multi-target-module.slang
@@ -0,0 +1,45 @@
+// multi-target-module.slang
+ // Test that a slang-module can store both SPIR-V and DXIL blobs separately
+ 
+ //TEST:SIMPLE(filecheck=CHECK): -o tests/modules/multi-target-module.slang-module -target dxil -embed-downstream-ir -target spirv -embed-downstream-ir -profile lib_6_6 -incomplete-library -dump-ir -verbose-paths
+ 
+ module multi_target_module;
+ 
+ // Simple function that will work on both SPIR-V and DXIL targets
+ public float4 addVectors(float4 a, float4 b)
+ {
+     return a + b;
+ }
+ 
+ // Another function that should be compatible with both targets
+ public float3 normalizeVector(float3 v)
+ {
+     return normalize(v);
+ }
+ 
+ [shader("compute")]
+ [numthreads(8, 8, 1)]
+ void main(uint3 dispatchThreadID : SV_DispatchThreadID)
+ {
+     float4 a = float4(1.0, 2.0, 3.0, 4.0);
+     float4 b = float4(5.0, 6.0, 7.0, 8.0);
+     
+     float4 result = addVectors(a, b);
+     
+     float3 v = float3(1.0, 1.0, 1.0);
+     float3 n = normalizeVector(v);
+ } 
+ 
+ // Check for the first occurrence of availableInDownstreamIR for addVectors in this section
+ // Check that there are two entries, one for dxil and one for spirv.
+ // CHECK: [availableInDownstreamIR(6 : Int)]
+ // CHECK: [availableInDownstreamIR(10 : Int)]
+ // CHECK: [public]
+ // CHECK: [export("_S19multi_target_module10addVectorsp2pi_v4fi_v4fv4f")]
+
+ // Check for the second occurrence of availableInDownstreamIR for normalizeVector in this section
+ // Check that there are two entries, one for dxil and one for spirv.
+ // CHECK: [availableInDownstreamIR(6 : Int)]
+ // CHECK: [availableInDownstreamIR(10 : Int)]
+ // CHECK: [public]
+ // CHECK: [export("_S19multi_target_module15normalizeVectorp1pi_v3fv3f")]
\ No newline at end of file
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