From 14f4b45d4b977805c5dbe472e327bdd3e856fb94 Mon Sep 17 00:00:00 2001
From: Yong He <yonghe@outlook.com>
Date: Sun, 27 Oct 2024 09:40:17 -0700
Subject: Add `InterlockedAddF64` intrinsic. (#5412)

---
 source/slang/hlsl.meta.slang           | 15 +++++++++++++++
 source/slang/slang-capabilities.capdef | 12 ++++++++++++
 2 files changed, 27 insertions(+)

(limited to 'source')

diff --git a/source/slang/hlsl.meta.slang b/source/slang/hlsl.meta.slang
index 7c18f4717..39957f7ce 100644
--- a/source/slang/hlsl.meta.slang
+++ b/source/slang/hlsl.meta.slang
@@ -4425,6 +4425,21 @@ ${{{{
         }
     }
 
+    [require(cuda, cuda_sm_6_0)]
+    [require(spirv, spvAtomicFloat64AddEXT)]
+    void InterlockedAddF64(uint byteAddress, double valueToAdd, out double originalValue)
+    {
+        __target_switch
+        {
+        case cuda: __intrinsic_asm "(*$3 = atomicAdd($0._getPtrAt<double>($1), $2))";
+        default:
+            {
+                let buf = __getEquivalentStructuredBuffer<double>(this);
+                originalValue = __atomic_add(buf[byteAddress / 8], valueToAdd);
+                return;
+            }
+        }
+    }
     // FP16x2
 
     /// @internal
diff --git a/source/slang/slang-capabilities.capdef b/source/slang/slang-capabilities.capdef
index 801d54eca..ed286eb86 100644
--- a/source/slang/slang-capabilities.capdef
+++ b/source/slang/slang-capabilities.capdef
@@ -254,6 +254,10 @@ alias cpp_cuda = cpp | cuda;
 /// [Compound]
 alias cpp_cuda_spirv = cpp | cuda | spirv;
 
+/// CUDA and SPIRV code-gen targets
+/// [Compound]
+alias cuda_spirv = cuda | spirv;
+
 /// CPP, CUDA, GLSL and SPIRV code-gen targets
 /// [Compound]
 alias cpp_cuda_glsl_spirv = cpp | cuda | glsl | spirv;
@@ -522,6 +526,10 @@ def spvAtomicFloat32AddEXT : SPV_EXT_shader_atomic_float_add;
 /// [EXT]
 def spvAtomicFloat16AddEXT : SPV_EXT_shader_atomic_float16_add;
 
+/// Represents the SPIR-V capability for atomic float 64 add operations.
+/// [EXT]
+def spvAtomicFloat64AddEXT : SPV_EXT_shader_atomic_float_add;
+
 /// Represents the SPIR-V capability for 64-bit integer atomics.
 /// [EXT]
 def spvInt64Atomics : _spirv_1_0;
@@ -534,6 +542,10 @@ def spvAtomicFloat32MinMaxEXT : SPV_EXT_shader_atomic_float_min_max;
 /// [EXT]
 def spvAtomicFloat16MinMaxEXT : SPV_EXT_shader_atomic_float_min_max;
 
+/// Represents the SPIR-V capability for atomic float 64 min/max operations.
+/// [EXT]
+def spvAtomicFloat64MinMaxEXT : SPV_EXT_shader_atomic_float_min_max;
+
 /// Represents the SPIR-V capability for 'derivative control' operations.
 /// [EXT]
 def spvDerivativeControl : _spirv_1_0;
-- 
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