From 13250ffa4d54c4e51b0a6473927e50a5da351ab3 Mon Sep 17 00:00:00 2001 From: Jay Kwak <82421531+jkwak-work@users.noreply.github.com> Date: Fri, 3 May 2024 10:06:39 -0700 Subject: Utilize vector operations over scalar if possible (#4092) * Utilize vector operations over scalar if possible Closes #4085 * Fix for the failing CI [ForceUnroll] is removed because it changed the emitted SPIR-V code a little differently for half-conversion.slang. SPIR-V code style is changed to a more preferred style, from "OpXX $$T result $x" to "result:$$T = OpXX $x" --- source/slang/hlsl.meta.slang | 53 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 51 insertions(+), 2 deletions(-) (limited to 'source') diff --git a/source/slang/hlsl.meta.slang b/source/slang/hlsl.meta.slang index ae81289d1..dc64705dd 100644 --- a/source/slang/hlsl.meta.slang +++ b/source/slang/hlsl.meta.slang @@ -4888,7 +4888,17 @@ uint16_t asuint16(float16_t value) [__readNone] [require(cuda_glsl_hlsl_spirv, shader5_sm_5_0)] vector asuint16(vector value) -{ VECTOR_MAP_UNARY(uint16_t, N, asuint16, value); } +{ + __target_switch + { + case hlsl: __intrinsic_asm "asuint16"; + case spirv: return spirv_asm { + result:$$vector = OpBitcast $value + }; + default: + VECTOR_MAP_UNARY(uint16_t, N, asuint16, value); + } +} [__readNone] [require(cuda_glsl_hlsl_spirv, shader5_sm_5_0)] @@ -4913,8 +4923,19 @@ float16_t asfloat16(uint16_t value) } [__readNone] +[require(cuda_glsl_hlsl_spirv, shader5_sm_5_0)] vector asfloat16(vector value) -{ VECTOR_MAP_UNARY(float16_t, N, asfloat16, value); } +{ + __target_switch + { + case hlsl: __intrinsic_asm "asfloat16"; + case spirv: return spirv_asm { + result:$$vector = OpBitcast $value + }; + default: + VECTOR_MAP_UNARY(float16_t, N, asfloat16, value); + } +} [__readNone] matrix asfloat16(matrix value) @@ -4986,6 +5007,9 @@ vector asfloat16(vector value) __target_switch { case hlsl: __intrinsic_asm "asfloat16"; + case spirv: return spirv_asm { + OpBitcast $$vector result $value + }; default: return asfloat16(asuint16(value)); } } @@ -6123,6 +6147,14 @@ vector f16tof32(vector value) __target_switch { case hlsl: __intrinsic_asm "f16tof32"; + case spirv: + { + return spirv_asm { + %lowBits = OpUConvert $$vector $value; + %half = OpBitcast $$vector %lowBits; + result:$$vector = OpFConvert %half + }; + } default: VECTOR_MAP_UNARY(float, N, f16tof32, value); } @@ -6162,6 +6194,14 @@ vector f32tof16(vector value) __target_switch { case hlsl: __intrinsic_asm "f32tof16"; + case spirv: + { + return spirv_asm { + %half = OpFConvert $$vector $value; + %lowBits = OpBitcast $$vector %half; + result:$$vector = OpUConvert %lowBits + }; + } default: VECTOR_MAP_UNARY(uint, N, f32tof16, value); } @@ -7757,6 +7797,9 @@ vector isfinite(vector x) __target_switch { case hlsl: __intrinsic_asm "isfinite"; + case glsl: + case spirv: + return !(isinf(x) || isnan(x)); default: VECTOR_MAP_UNARY(bool, N, isfinite, x); } @@ -8508,6 +8551,9 @@ vector modf(vector x, out vector ip) { case hlsl: __intrinsic_asm "modf"; case glsl: __intrinsic_asm "modf"; + case spirv: return spirv_asm { + result:$$vector = OpExtInst glsl450 Modf $x &ip + }; default: VECTOR_MAP_BINARY(T, N, modf, x, ip); } @@ -9182,6 +9228,9 @@ vector rcp(vector x) __target_switch { case hlsl: __intrinsic_asm "rcp"; + case glsl: + case spirv: + return T(1.0) / x; default: VECTOR_MAP_UNARY(T, N, rcp, x); } -- cgit v1.2.3