From c5b0708ead5de2d90ef14f20b5b8e3ed4f576373 Mon Sep 17 00:00:00 2001
From: jsmall-nvidia <jsmall@nvidia.com>
Date: Fri, 30 Jun 2023 15:25:59 -0400
Subject: Fix for operator assignment issue (#2951)

* WIP handling LValue coercion via LValueImplicitCast

* Need to have the ptr type for the cast.

* Casting conversion working on C++.

* Make the LValue casts record if in or in/out as we can produce better code if we know the difference.

* WIP LValueCast pass

* Fix tests so we don't fail because downstream compilers detect use of uninitialized variable.

* Do conversions through through tmp for l-value scenarios that can't work other ways.

* Fix a typo.

* Change diagnostic implicit-cast-lvalue for a type that still exhibits the issue.

* Add matrix test.

* Added a bit more clarity around LValue casting choices.

* Small comment improvements.
Improvements based on comments on PR.

* Use findOuterGeneric.
---
 source/slang/slang-type-layout.cpp | 56 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

(limited to 'source/slang/slang-type-layout.cpp')

diff --git a/source/slang/slang-type-layout.cpp b/source/slang/slang-type-layout.cpp
index 29cf86f5e..4d52b76eb 100644
--- a/source/slang/slang-type-layout.cpp
+++ b/source/slang/slang-type-layout.cpp
@@ -1689,6 +1689,62 @@ bool isCUDATarget(TargetRequest* targetReq)
     }
 }
 
+SourceLanguage getIntermediateSourceLanguageForTarget(TargetRequest* req)
+{
+    // If we are emitting directly, there is no intermediate source language
+    if (req->shouldEmitSPIRVDirectly())
+    {
+        return SourceLanguage::Unknown;
+    }
+
+    switch (req->getTarget())
+    {
+        case CodeGenTarget::GLSL:
+        case CodeGenTarget::GLSL_Vulkan:
+        case CodeGenTarget::GLSL_Vulkan_OneDesc:
+            // If we aren't emitting directly we are going to output GLSL to feed to GLSLANG
+        case CodeGenTarget::SPIRV:
+        case CodeGenTarget::SPIRVAssembly:
+        {
+            return SourceLanguage::GLSL;
+        }
+        case CodeGenTarget::HLSL:
+        case CodeGenTarget::DXBytecode:
+        case CodeGenTarget::DXBytecodeAssembly:
+        case CodeGenTarget::DXIL:
+        case CodeGenTarget::DXILAssembly:
+        {
+            // Currently DXBytecode and DXIL are generated via HLSL
+            return SourceLanguage::HLSL;
+        }
+        case CodeGenTarget::CSource:
+        {
+            return SourceLanguage::C;
+        }
+        case CodeGenTarget::ShaderSharedLibrary:
+        case CodeGenTarget::ObjectCode:
+        case CodeGenTarget::HostExecutable:
+        case CodeGenTarget::HostHostCallable:
+        case CodeGenTarget::ShaderHostCallable:
+        case CodeGenTarget::CPPSource:
+        case CodeGenTarget::HostCPPSource:
+        case CodeGenTarget::PyTorchCppBinding:
+        {
+            // For CPU based scenarios are generated via C++
+            return SourceLanguage::CPP;
+        }
+        case CodeGenTarget::CUDAObjectCode:
+        case CodeGenTarget::CUDASource:
+        case CodeGenTarget::PTX:
+        {
+            return SourceLanguage::CUDA;
+        }
+        default: break;
+    }
+
+    return SourceLanguage::Unknown;
+}
+
 bool areResourceTypesBindlessOnTarget(TargetRequest* targetReq)
 {
     return isCPUTarget(targetReq) || isCUDATarget(targetReq);
-- 
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