slang.git/tests/nv-extensions, branch master

Update spirv-header and spirv-tools to Jun/2024 (#4679)

2024-07-18T20:21:12+00:00

The following external directories are updated. It is to use a new SPIRV keyword, "OpExtInstWithForwardRefs". Related to #4304 external/spirv-header: > commit 2acb319af38d43be3ea76bfabf3998e5281d8d12 > Author: Kévin Petit kevin.petit@arm.com > Date: Wed Jun 12 16:41:14 2024 +0100 > SPV_ARM_cooperative_matrix_layouts (#433) external/spirv-tools: > commit ce46482db7ab3ea9c52fce832d27ca40b14f8e87 > Author: Nathan Gauër brioche@google.com > Date: Thu Jun 6 12:17:51 2024 +0200 > Add KHR suffix to OpExtInstWithForwardRef opcode. (#5704) > The KHR suffix was missing from the published SPIR-V extension. > This is now fixed, but requires some patches in SPIRV-Tools. external/spirv-tools-generated: This is generated from spirv-tools

Legalization of non-struct when function expects struct, resolves #3840 (#3880)

2024-04-04T00:43:24+00:00

* Legalization of non-struct when expects struct. `__forceVarIntoStructTemporarily()` solves the issue of passing "non-struct type's" into a parameter that only accepts "struct type's". The intrinsic solves the issue through checking the parameter of the intrinsic: If the parameter is a "struct type" * Return a reference to the parameter else * a "struct type" Temporary variable is made and the "non struct type" parameter is copied to a member of this struct. This struct is then returned by `__forceVarIntoStructTemporarily()`. Optionally if the use location of this call is a argument which can have side effects (out, inout, ref, etc.) the temporary struct variable is copied into the original "non struct type" parameter. Testing code has "addComplexity" functions to avoid optimizations through forcing side effects so we can predict the code output. * Address review comments - ForceInline ray functions - fix testing - adjust how we replace operands in senarios to avoid unexpected side effects of replacing operands without any explicit checks * Adjust nv test slightly and remove .glsl file * Remove implicit LOD sampling & test additions - Implicit LOD sampling is not allowed in a raygen. Implicit LOD sampling requires depth (from a fragment shader) to sample. Raygen does not have the depth, so this function was replaced. - Changed other tests for correctness/clarity * Test if Falcor breaks through use of ForceInline * Add back force inline may need to look at how Falcor wrote its slang shaders. This will be done if ForceInline causes issues since ForceInline should not affect code gen in an impactable way.

Implement GLSL gimageDim & memory qualifiers with optional extension(s); resolves #3587 for GLSL & SPIR-V targets #3631 (#3810)

2024-03-26T20:07:32+00:00

* [early push of code since memory qualifiers may be made into a seperate branch & pr and I rather make it simple to split the implementation if required] all type & functions impl. for GLSL image type added all memory qualifiers & tests for direct read/write [GLSL syntax] (DID NOT test or implement parameter qualifiers, that is next commit) * this inlcudes emit-glsl & emit-spirv for qualifier decorations * this also includes error handling * this includes parsing * full implementation other than Rect; all errors and basic tests are done & working what is left: 1. need to now add Rect type support (additional TextureImpl flag) 2. tests 3. testing infrastructure to support variety of types * testing framework now works with images of all types and imageBuffers -- next steps are actual tests * push code for mostly working image atomics; missing int64/uint64 tests and slightly broken feature likley due to missing code from master which I pushed for regular atomics * fix all remaining shader image atomic issues and tests to work with float & i64/u64 fully will now clean up code and squash the commits (since they are quite all over the place) * refactor code to work & look correct, fix all regressions Turned off tests for texture format R64 due to the shader use limitation of currently being only for storage buffers on most hardware (test fail cause, this is not allowed) Changed raygen.slang & nv-ray-tracing-motion-blur.slang since both cross-compiled with glslang, which does not respect layout(rgba8) for RWBuffer's, in this scenario making the type into a SPIR-V rgba32f, which is incorrect and a known problem, this causes different code to be outputted from Slang & HLSL+GLSL->Slang paths Clean up all code and better explain the "why" for the gimageDim definition we use various strings of Slang code, the gist is: 1. Parameters are structured as per IMAGE_PARAM keyword in spec, and we respect this in order to match specification (to allow easy code iteration) 2. sample parameters are required for functions 3. types are inconsistently named fixed regression of breaking l-value lowering when r-value should be lowered (lower-to-ir) fix compiler warnings remove unneeded lambdas `expr->type.isLeftValue = isMutableGLSLBufferBlockVarExpr(baseExpr) && (expr->type.hasReadOnlyOnTarget == false);` is an adjustment made such that a buffer block is mutable only if the block is mutable and the base expression is mutable (to handle case of readonly buffer block, immutable) * remove rectangle parameter * use proper const syntax and struct naming * adjust syntax * adjust modifier capabilitites: HLSL+GLSL --> GLSL. Notice most specifically, if the parent is a global struct we can put a memory qualifier, this does not include, struct inside a struct, with a member variable with a memory qualifier (since then you could use the struct in invalid ways). Added test for struct inside struct with member variable with memory qualifier. adjust syntax and remove code which will rot * adjust formatting for consistency * addressing review feedback addressing review feedback: change testing code to handle int and float/half correctly in all cases adjust testing code syntax as requested change vkdevice code to fit a different form as requested * adjust code as per requested for review: 1. adjusted testing code logic to handle non 0-1 values appropriately, notice int8_t will likley be the range and set order of {[0,127],[-1,-128]}, this is intentional 2. syntax adjustments for correctness * trying to fix falcor regressions * add back removed code for regression testing * test removing changes which may break falcor * Revert "test removing changes which may break falcor" This reverts commit 240da97f06c23e98a26ac23cf1d385995c67b251. * disable R64 support in attempt to fix falcor tests * Revert "disable R64 support in attempt to fix falcor tests" This reverts commit 317cb632eb2f47e980fc4aeafe418f8060f4c473. * disable major device changes (still trying to figure out falcor fails -- locally working different than CI) * test removing d3d changes * remove all format changes * add back removed code for regression testing * try something to get code to work with falcor * address review * Add way to handle constref/ref/encapsulated texture objects with memory qualifiers as a parameter. Fixed an issue (and improved codegen) for when we have a store(dst,load(src)) pattern, where dst is supposed to be equal to src for when resolving globalParam's (no need for work-arounds anymore) * move recent-fix/change to textureType loading into a proper optimization pass which now runs after SPIR-V legalization to catch odd SPIR-V emitting after legalizing types for SPIR-V * Revert most recent optimization pass change, add work around getting a unmangled global parameter address through a intrinsic op instead of spir-v intrinsic (works same as `__imagePointer()`) * remove unneeded changes * remove unneeded `__constref` in glsl.meta * move memory qualifier checks to visitInvoke of check-expr.cpp move GetLegalizedSPIRVGlobalParamAddr resolving to spirv-legalization pass move error for "if using non texture type with memory qualifer in param" earlier such that we error with this first. No point in telling user "you are not putting correct memory qualifiers" when memory qualifiers should not have been used. * add memory qualifier folding modifier 'MemoryQualifierCollectionModifier' to reduce searching and processing (later will be adapted to whole system) as suggested/asked. The utility is a method to track memory qualifiers without doing a expensive linked-list traversal (image's have 4 modifiers normally). * properly pass multiple qualifiers from checkModifier down to the `modifier`s list * addressing review comments: * change implementation to properly handle restrict modifier * add comments about implementation for clarity

Add check for invalid use of modifiers. (#3402)

2023-12-12T22:07:35+00:00

* Add check for invalid use of modifiers. * Fixes. * Add test. --------- Co-authored-by: Yong He

SPIR-V image operations (#3163)

2023-09-05T15:26:59+00:00

* Add __truncate and __sampledType for spirv_asm Allows some texture tests to start passing * add __isVector Currently unused * Add 1-vector legalization pass (WIP) * Add capabilities for image types * neaten instruction dumping * add 1-vector test * Add a couple of cases to vec1 legalization * Remove texture tests from expected failures * comment * regenerate vs projects * Remove redundant define form synchapi emulation * refactoring image methods * All sample functions refactored * Remove incorrect glsl intrinsics Partially addresses https://github.com/shader-slang/slang/issues/3174 * __subscript image ops via writing funcs * Extract texture struct writing from core.meta.slang * Abstract out cuda intrinsic * Remvoe erroneous call to opDecorateIndex * spirv asm IR utils * Correct position of loads for SPIR-V asm inst operands * Raise constructors to global scope during spir-v legalization * Correct snippet output * Implement most texture sampling ops for SPIR-V * Legalize 1-vectors for glsl too * Make SPIR-V inst operands non-hoistable * Better 1-vector legalization * Put textures in ptrs for spirv * insert missing break * Add vec1 legalization test * Add some missing pieces to slang-ir-insts * Greatly neaten vec1 legalization * a * Neaten vec1 legalization * Add image read and write intrinsics for spir-v * Squash warnings * regenerate vs projects * Drop redundant guards * Drop 5 tests from expected failure list * Inst numbering changes to cross compile tests * vec1 legalization tests only on vk * Correct location of asm op emit * Inline constant in spirv-asm * Correct signedness for lane in wave intrinsics * Extract element from float1 for cuda * squash warnings * Neaten spirv-emit * dedupe more capabilities * warnings * neaten assert * comments * comments

Various dxc/fxc compatibility fixes. (#2863)

2023-05-03T03:29:38+00:00

* Various dxc/fxc compatibility fixes. * Cleanup. * Fix test cases. * Fix comments. --------- Co-authored-by: Yong He

For C-like targets, emit resource declarations before other globals (#2843)

2023-04-26T19:46:24+00:00

* For C-like targets, emit resource declarations before other globals * Remove unused tests

Fix optimization pass not converging. (#2725)

2023-03-23T23:59:02+00:00

* Fix optimization pass not converging. * Fix. * Fix tests. --------- Co-authored-by: Yong He

More control flow simplifications. (#2673)

2023-02-24T18:01:47+00:00

* More control flow and Phi param simplifications. * Fix. * Fix gcc error. * Fix. * More IR cleanup. * Fix bug in phi param dce + ifelse simplify. * Propagate and DCE side-effect-free functions. * Enhance CFG simplifcation to remove loops with no side effects. * Fix. * Fixes. * Fix tests. Add [__AlwaysFoldIntoUseSite] for rayPayloadLocation. * More cleanup. * Fixes. * Fix. --------- Co-authored-by: Yong He

Overhaul global inst deduplication and cpp/cuda backend. (#2654)

2023-02-16T21:55:32+00:00

* Overhaul global inst deduplication and cpp/cuda backend. * Update IR documentation. --------- Co-authored-by: Yong He