Making it easier to work with shaders https://git.yummers.dev/slang.git/atom?h=master 2024-02-01T21:26:03+00:00 2024-02-01T21:26:03+00:00 Yong He yonghe@outlook.com 2024-02-01T21:26:03+00:00 urn:sha1:f370947c63bca707b9cfde7b18e67298f5fbace3 * FP16 atomics for RWByteAddresBuffer, fp32 atomics for images. * Fix spelling. * Add overload. * Fix test failures. --------- Co-authored-by: Yong He <yhe@nvidia.com> 2023-09-12T09:44:34+00:00 Ellie Hermaszewska ellieh@nvidia.com 2023-09-12T09:44:34+00:00 urn:sha1:3f4081d854db2d186adea4067da575eca7c7adf1 * Correctly identify the number of operands to image sampling operands in SPIR-V * Neaten imageoperands warning test * Neaten imageoperands warning test 2023-09-05T15:26:59+00:00 Ellie Hermaszewska ellieh@nvidia.com 2023-09-05T15:26:59+00:00 urn:sha1:2c2294d3310b24fd73cd41ec51338a736f3a2886 * Add __truncate and __sampledType for spirv_asm Allows some texture tests to start passing * add __isVector Currently unused * Add 1-vector legalization pass (WIP) * Add capabilities for image types * neaten instruction dumping * add 1-vector test * Add a couple of cases to vec1 legalization * Remove texture tests from expected failures * comment * regenerate vs projects * Remove redundant define form synchapi emulation * refactoring image methods * All sample functions refactored * Remove incorrect glsl intrinsics Partially addresses https://github.com/shader-slang/slang/issues/3174 * __subscript image ops via writing funcs * Extract texture struct writing from core.meta.slang * Abstract out cuda intrinsic * Remvoe erroneous call to opDecorateIndex * spirv asm IR utils * Correct position of loads for SPIR-V asm inst operands * Raise constructors to global scope during spir-v legalization * Correct snippet output * Implement most texture sampling ops for SPIR-V * Legalize 1-vectors for glsl too * Make SPIR-V inst operands non-hoistable * Better 1-vector legalization * Put textures in ptrs for spirv * insert missing break * Add vec1 legalization test * Add some missing pieces to slang-ir-insts * Greatly neaten vec1 legalization * a * Neaten vec1 legalization * Add image read and write intrinsics for spir-v * Squash warnings * regenerate vs projects * Drop redundant guards * Drop 5 tests from expected failure list * Inst numbering changes to cross compile tests * vec1 legalization tests only on vk * Correct location of asm op emit * Inline constant in spirv-asm * Correct signedness for lane in wave intrinsics * Extract element from float1 for cuda * squash warnings * Neaten spirv-emit * dedupe more capabilities * warnings * neaten assert * comments * comments 2023-08-29T12:58:44+00:00 Ellie Hermaszewska ellieh@nvidia.com 2023-08-29T12:58:44+00:00 urn:sha1:f3ecf978a07b02681a4d70a9d83991e6661bf753 * Correct parsing spirv with no rhs operands * Guard against eof 2023-08-29T04:24:49+00:00 Yong He yonghe@outlook.com 2023-08-29T04:24:49+00:00 urn:sha1:c787c4b82ba76f87069911f203eb192060b5264f * Add `target_switch` and `__intrinsic_asm` statement. * Cleanup. * WaveGetActiveMask, WaveGetActiveMask, WaveCountBits. * WaveIsFirstLane. * More wave intrinsics. * wave intrinsics. * merge fix. * Fix. * Fix. * Update test. * update test. * Fix. --------- Co-authored-by: Yong He <yhe@nvidia.com> 2023-08-28T22:05:26+00:00 Ellie Hermaszewska ellieh@nvidia.com 2023-08-28T22:05:26+00:00 urn:sha1:508dc3a95de50de4a4d07d0a72a18e40d55b0e2e * Add -spirv-core-grammar option to load alternate spirv defs Also embed a version to use by default * Use perfect hash for spv op lookup * Neaten perfect hash embedding * Refactor spirv grammar lookup in preperation for more kinds of lookups * Load spirv capability list from spec * Add all SPIR-V enums to lookup table * regenerate vs projects * appease msvc * Use string slices for spir-v core grammar lookups * wiggle * comment * Add OpInfo for spv ops * regenerate vs projects * Embed op names * Add min/max operand counts and enum categories to spirv info * neaten * Operand kinds for spirv ops * Store and embed all information relating to spirv enums and qualifiers * Use SPIR-V spec to position instructions in spirv_asm blocks * Neaten spir-v info embedding * Neaten perfect hash embedding * Add assignment syntax to spirv_asm snippets * Better errors for spirv_asm parser * Add warning for too many operands in spirv asm * squash warnings * neaten * test wiggle * Lookup enums for spirv * Put OpCapability and OpExtension in the correct place for spirv_asm blocks * Tests for OpCapability and OpExtension * ci wiggle * Add expected failure * Allow raising immediate values to constant ids where necessary in spirv_asm blocks * Allow bitwise or expressions and numeric literals in spirv_asm blocks * test numeric literals * Fix memory issues. * fix. --------- Co-authored-by: Yong He <yonghe@outlook.com> 2023-08-25T17:42:34+00:00 Ellie Hermaszewska ellieh@nvidia.com 2023-08-25T17:42:34+00:00 urn:sha1:ef4c9f1f1c297f1a33be95795a7a7561e0cc3bde * Initial version of spirv_asm block * Correct indentation of parent instruction dumping * neater dumping for spirv_asm instructions * Add $$ DollarDollar token * Allow passing addresses to spirv_asm blocks * spirv OpUndef * String literals in spirv asm * OpName for spirv_asm ids * Correct failure in lower spirv_asm * correct position for spirv_asm idents * comment correct * several more tests for spirv_asm blocks * Fill out some unimplemented functions for spirv_asm expressions --------- Co-authored-by: Yong He <yonghe@outlook.com>