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<title>slang.git/tests/hlsl, branch master</title>
<subtitle>Making it easier to work with shaders</subtitle>
<id>https://git.yummers.dev/slang.git/atom?h=master</id>
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<updated>2025-09-03T05:15:57+00:00</updated>
<entry>
<title>Fix#8086: Batch-10: Enable cuda tests (#8270)</title>
<updated>2025-09-03T05:15:57+00:00</updated>
<author>
<name>Harsh Aggarwal (NVIDIA)</name>
<email>haaggarwal@nvidia.com</email>
</author>
<published>2025-09-03T05:15:57+00:00</published>
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<id>urn:sha1:639978008de3a74c00e03451cd9fc74452766fcd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>render-test: Change D3D12 default to sm_6_5 (#8320)</title>
<updated>2025-09-02T23:43:48+00:00</updated>
<author>
<name>James Helferty (NVIDIA)</name>
<email>jhelferty@nvidia.com</email>
</author>
<published>2025-09-02T23:43:48+00:00</published>
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<id>urn:sha1:f02b08490aa905f42a8d90381db84b1f8e409c0c</id>
<content type='text'>
Changes default for render-test to sm_6_5.
Since sm_6_5 is the new default, remove the -use-dxil option, add
-use-dxcb option
Remove -use-dxil option from all test cases.
Add -use-dxcb to two tests that needed it.

Fixes #7611</content>
</entry>
<entry>
<title>Enable tests for CUDA (#7593)</title>
<updated>2025-07-03T12:30:38+00:00</updated>
<author>
<name>Mukund Keshava</name>
<email>mkeshava@nvidia.com</email>
</author>
<published>2025-07-03T12:30:38+00:00</published>
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<id>urn:sha1:141eac9eb4400cf94c0a076f339e1d43ed652306</id>
<content type='text'>
Enable intrinsic tests for cuda. Most of these tests were either
disabled or just not enabled for cuda.

Fixes #7592

Co-authored-by: Ellie Hermaszewska &lt;ellieh@nvidia.com&gt;</content>
</entry>
<entry>
<title>Fix argument to float3 cbuffer tests (#7391)</title>
<updated>2025-06-12T18:29:56+00:00</updated>
<author>
<name>James Helferty (NVIDIA)</name>
<email>jhelferty@nvidia.com</email>
</author>
<published>2025-06-12T18:29:56+00:00</published>
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<id>urn:sha1:3ffeaf4c7f22bfe95702da76d710362b277e15ac</id>
<content type='text'>
Results of these tests had been marked ignored, because they failed on
VK with the GLSL backend. This change removes them from the
expected-failure.txt file and adds the correct command line option to
avoid using the GLSL target.

Addresses concern raised on #7282</content>
</entry>
<entry>
<title>Allow checking capabilities in specific stages (#7375)</title>
<updated>2025-06-10T16:44:08+00:00</updated>
<author>
<name>jarcherNV</name>
<email>jarcher@nvidia.com</email>
</author>
<published>2025-06-10T16:44:08+00:00</published>
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<id>urn:sha1:3fa382505271834514d47612efee8e51a06204c5</id>
<content type='text'>
This allows checking capabilities in any stage, needed specifically for
the hlsl_2018 capability which is defined for sm_5_1 and above. Stage
specific capabilities such as cs_5_1 would not find this in any stage
other than compute, so we need to restrict the check to only desired
stages.</content>
</entry>
<entry>
<title>Fix IR layout of 3-element vectors in cbuffers for -fvk-use-dx-layout (#7282)</title>
<updated>2025-06-10T15:02:38+00:00</updated>
<author>
<name>James Helferty (NVIDIA)</name>
<email>jhelferty@nvidia.com</email>
</author>
<published>2025-06-10T15:02:38+00:00</published>
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<id>urn:sha1:e37202002276b679c5241b2678af612552b06d2c</id>
<content type='text'>
* Better handling for 16-byte boundary of d3d cbuffer

Fixes #6921

D3D cbuffers have slightly different packing rules that allow packing
vectors into a 16-byte slot at element alignments, except when
a field would cross a 16-byte boundary. In that case, we need to
realign the field to the next 16-byte boundary.

In particular, this impacts vec3s, which are not a power of two in
size and thus require slightly different alignment logic, compared to
std430 and std140. (Example: a float and float3 should fit together in
that order in a single slot.)

Adds test cases.

Adds documentation page for GLSL target</content>
</entry>
<entry>
<title>Support Vulkan memory model (#7057)</title>
<updated>2025-05-17T02:26:44+00:00</updated>
<author>
<name>Jay Kwak</name>
<email>82421531+jkwak-work@users.noreply.github.com</email>
</author>
<published>2025-05-17T02:26:44+00:00</published>
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<id>urn:sha1:d58243d9041947c99f18b82385e62c082507decb</id>
<content type='text'>
The user can explicitly use Vulkan memory model, or it will be
automatically used when cooperative-matrix is used.

When vulkan memory model is used, two keywords, "Coherent" and
"Volatile", are not allowed.

There are many differences regarding atomic and texture but
this PR has changes limited to support `globallycoherent`
keyword. When variables with `globallycoherent` is used with `OpLoad`, it
will use additional options, `MakePointerAvailable|NonPrivatePointer`,
that will provide the same effect. For `OpStore`, it will use
`MakePointerVisible|NonPrivatePointer`.
</content>
</entry>
<entry>
<title>Add checking for hlsl register semantic. (#7118)</title>
<updated>2025-05-15T19:51:29+00:00</updated>
<author>
<name>Yong He</name>
<email>yonghe@outlook.com</email>
</author>
<published>2025-05-15T19:51:29+00:00</published>
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<id>urn:sha1:0d6312f3be66f4bff9eec9606228db3edc309e2c</id>
<content type='text'>
* Add checking for hlsl register semantic.

* Fix.

* Fix test.

* Fix switch error.

* Fix tests.</content>
</entry>
<entry>
<title>Support for Payload Access Qualifiers (#3448) (#6595)</title>
<updated>2025-04-07T07:56:11+00:00</updated>
<author>
<name>Harsh Aggarwal (NVIDIA)</name>
<email>haaggarwal@nvidia.com</email>
</author>
<published>2025-04-07T07:56:11+00:00</published>
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<id>urn:sha1:ce87ab925d06a784eec194081e00a1b4c9b94d0c</id>
<content type='text'>
* Add support for Ray Payload Access Qualifiers (PAQs) (#3448)

- Added [raypayload] attribute for struct declarations
- Implemented field validation requiring read/write access qualifiers
- Added diagnostic error for missing qualifiers
- Enabled PAQs in DXC compiler and HLSL emission
- Added new test demonstrating PAQ syntax
- Implemented proper handling of ray payload attributes in IR generation

* format code

* Cleanup: Remove unused vars

* Add check to enablePAQ only for profile &gt;= lib_6_7

* Review Fix - Add PAQ support for DX Raytracing

add enablePAQ flag to DownstreamCompileOpitons, improve PAQ handling
update raypayload-attribute-paq.slang to ensure hlsl and dxil is
validated

* Add diagnostic test for missing paq for lib_6_7

Compile using `-disable-payload-qualifiers` aka lib_6_6 profile
raypayload-attribute-no-struct.slang and
raypayload-attribute.slang

---------

Co-authored-by: slangbot &lt;186143334+slangbot@users.noreply.github.com&gt;
Co-authored-by: Ellie Hermaszewska &lt;ellieh@nvidia.com&gt;</content>
</entry>
<entry>
<title>Emit errors for missing returns on unsupported targets (#6633)</title>
<updated>2025-03-21T15:52:28+00:00</updated>
<author>
<name>Darren Wihandi</name>
<email>65404740+fairywreath@users.noreply.github.com</email>
</author>
<published>2025-03-21T15:52:28+00:00</published>
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<id>urn:sha1:844d8d2212d11f3d28a55c81f234c99db2c26250</id>
<content type='text'>
* initial wip

* more WIP

* preserve old lower behavior

* remove unnecessary includes

* add test

* add no target case in test

* fix broken test

---------

Co-authored-by: Ellie Hermaszewska &lt;ellieh@nvidia.com&gt;</content>
</entry>
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