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<title>slang.git/tests/cuda/dispatch-thread-id-extraction.slang, branch master</title>
<subtitle>Making it easier to work with shaders</subtitle>
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<updated>2025-10-16T03:59:47+00:00</updated>
<entry>
<title>Immutable access qualifier for pointers and use `__ldg` on cuda. (#8710)</title>
<updated>2025-10-16T03:59:47+00:00</updated>
<author>
<name>Yong He</name>
<email>yonghe@outlook.com</email>
</author>
<published>2025-10-16T03:59:47+00:00</published>
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<id>urn:sha1:01510f2c922af8629c7a730ef92a31fa83bd9f49</id>
<content type='text'>
This PR implements `Access.Immutable` to allow pointers to immutable
data.

The new type `ImmutablePtr&lt;T&gt;` is defined as an alias of `Ptr&lt;T,
Address.Immutable&gt;`.
By forming a immutable pointer, the programmer is conveying to the
compiler that the data at the pointer address will never change during
the execution of the current program. Therefore loads from immutable
pointers can be deduplicated by the compiler, and will translate to
`__ldg` when generating code for CUDA.

The SPIRV backend is not changed in this PR, since the current SPIRV
spec makes it very difficult to specify loads from immutable address
without generating tons of wrappers and boilerplate type declarations.
We would like to see the spec evolved a bit to around its support of
`NonWritable` physical storage pointers or immutable loads before we
attempt to express such immutability in SPIRV. For now we simply emit
ordinary pointers and loads when generating spirv.

---------

Co-authored-by: slangbot &lt;186143334+slangbot@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>Allow 1D SV_DispatchThreadID in CPU targets (#8612)</title>
<updated>2025-10-08T23:13:27+00:00</updated>
<author>
<name>Julius Ikkala</name>
<email>julius.ikkala@gmail.com</email>
</author>
<published>2025-10-08T23:13:27+00:00</published>
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<id>urn:sha1:1e4265edd4ec4c44e3d8f209fca802727076aa46</id>
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The varying param legalization pass didn't deal with this 1D form of
SV_DispatchThreadID for CPU targets:

```slang
void computeMain(int i : SV_DispatchThreadID)
```

Instead, it just overrode the type of `i` with a `uint3`, breaking lots
of code that attempted to use `i` for something, like a `switch`
statement for example.

I ran across this when going through `language-feature` tests for the
LLVM target, which will also use this legalization pass. I'm separately
submitting this now because this also fixes the existing CPU target. The
test I enable in this PR is one that was previously generating broken
code on CPU.

(somewhat related issue: #7468)</content>
</entry>
<entry>
<title>cuda: Improve entry handling for SV_DispatchThreadID (#6925)</title>
<updated>2025-04-30T12:20:50+00:00</updated>
<author>
<name>Mukund Keshava</name>
<email>mkeshava@nvidia.com</email>
</author>
<published>2025-04-30T12:20:50+00:00</published>
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<id>urn:sha1:54acb11b1c8b6af2504ff3a3e0f56ca8baba4753</id>
<content type='text'>
* cuda: Improve entry handling for SV_DispatchThreadID

Fixes #6780

This commit improves CUDA entry point handling by extracting appropriate
components from DispatchThreadID based on parameter type. It now
properly handles uint scalar (x component only) and uint2 vector (x,y
components) instead of always using the full uint3 value.
Add a new test case to check for this.

* format code

* fix CI failure

* Handle review comments

---------

Co-authored-by: slangbot &lt;186143334+slangbot@users.noreply.github.com&gt;
Co-authored-by: Ellie Hermaszewska &lt;ellieh@nvidia.com&gt;</content>
</entry>
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