From e78815de53005336c3746bcd85c2e789a43f1b94 Mon Sep 17 00:00:00 2001
From: Konstantin <const@const.me>
Date: Tue, 24 Jan 2023 17:40:50 +0100
Subject: Performance tuning on AMD iGPU

---
 ComputeShaders/ComputeShaders.vcxproj         | 2 --
 ComputeShaders/ComputeShaders.vcxproj.filters | 2 --
 ComputeShaders/mulMatByRowTiled64.hlsl        | 4 ----
 ComputeShaders/mulMatByRowTiledEx.hlsl        | 2 +-
 ComputeShaders/mulMatTiled64.hlsl             | 3 ---
 ComputeShaders/mulMatTiledEx.hlsl             | 2 +-
 6 files changed, 2 insertions(+), 13 deletions(-)
 delete mode 100644 ComputeShaders/mulMatByRowTiled64.hlsl
 delete mode 100644 ComputeShaders/mulMatTiled64.hlsl

(limited to 'ComputeShaders')

diff --git a/ComputeShaders/ComputeShaders.vcxproj b/ComputeShaders/ComputeShaders.vcxproj
index 300974a..b79f550 100644
--- a/ComputeShaders/ComputeShaders.vcxproj
+++ b/ComputeShaders/ComputeShaders.vcxproj
@@ -184,14 +184,12 @@
     <FxCompile Include="mulMatByRow.hlsl" />
     <FxCompile Include="mulMatByRow64.hlsl" />
     <FxCompile Include="mulMatByRowTiled.hlsl" />
-    <FxCompile Include="mulMatByRowTiled64.hlsl" />
     <FxCompile Include="mulMatByRowTiledEx.hlsl" />
     <FxCompile Include="mulMatByScalar.hlsl" />
     <FxCompile Include="mulMatDotMain.hlsl" />
     <FxCompile Include="mulMatDotReshape.hlsl" />
     <FxCompile Include="mulMatMadMain.hlsl" />
     <FxCompile Include="mulMatTiled.hlsl" />
-    <FxCompile Include="mulMatTiled64.hlsl" />
     <FxCompile Include="mulMatTiledEx.hlsl" />
     <FxCompile Include="norm.hlsl" />
     <FxCompile Include="normCompat.hlsl" />
diff --git a/ComputeShaders/ComputeShaders.vcxproj.filters b/ComputeShaders/ComputeShaders.vcxproj.filters
index de9f12f..fbf30d6 100644
--- a/ComputeShaders/ComputeShaders.vcxproj.filters
+++ b/ComputeShaders/ComputeShaders.vcxproj.filters
@@ -43,9 +43,7 @@
     <FxCompile Include="normFixed64.hlsl" />
     <FxCompile Include="mulMatByRowTiled.hlsl" />
     <FxCompile Include="convolutionMain2Fixed.hlsl" />
-    <FxCompile Include="mulMatByRowTiled64.hlsl" />
     <FxCompile Include="addRows.hlsl" />
-    <FxCompile Include="mulMatTiled64.hlsl" />
     <FxCompile Include="zeroMemory.hlsl" />
     <FxCompile Include="mulMatTiledEx.hlsl" />
     <FxCompile Include="matReshapePanels.hlsl" />
diff --git a/ComputeShaders/mulMatByRowTiled64.hlsl b/ComputeShaders/mulMatByRowTiled64.hlsl
deleted file mode 100644
index 6c63f2d..0000000
--- a/ComputeShaders/mulMatByRowTiled64.hlsl
+++ /dev/null
@@ -1,4 +0,0 @@
-#define THREADS_Y 32
-#define THREADS_X 32
-#define TILE_Y 128
-#include "mulMatByRowTiled.hlsl"
\ No newline at end of file
diff --git a/ComputeShaders/mulMatByRowTiledEx.hlsl b/ComputeShaders/mulMatByRowTiledEx.hlsl
index bc0c0c6..d286ec2 100644
--- a/ComputeShaders/mulMatByRowTiledEx.hlsl
+++ b/ComputeShaders/mulMatByRowTiledEx.hlsl
@@ -3,7 +3,7 @@
 static const uint TILE_SIZE = 32;
 #endif
 #ifndef THREADS_Y
-static const uint THREADS_Y = 16;
+static const uint THREADS_Y = 8;
 #endif
 
 // First tensor, reshaped into dense column major horizontal panels of size [ width, TILE_SIZE ]
diff --git a/ComputeShaders/mulMatTiled64.hlsl b/ComputeShaders/mulMatTiled64.hlsl
deleted file mode 100644
index 45d77b1..0000000
--- a/ComputeShaders/mulMatTiled64.hlsl
+++ /dev/null
@@ -1,3 +0,0 @@
-#define TILE_SIZE 64
-#define STREAM_SECOND_MATRIX 1
-#include "mulMatTiled.hlsl"
\ No newline at end of file
diff --git a/ComputeShaders/mulMatTiledEx.hlsl b/ComputeShaders/mulMatTiledEx.hlsl
index e6d6940..c59e3ea 100644
--- a/ComputeShaders/mulMatTiledEx.hlsl
+++ b/ComputeShaders/mulMatTiledEx.hlsl
@@ -6,7 +6,7 @@
 static const uint TILE_SIZE = 32;
 #endif
 #ifndef TILE_HEIGHT
-static const uint TILE_HEIGHT = 32;
+static const uint TILE_HEIGHT = 64;
 #endif
 #ifndef THREADS_Y
 static const uint THREADS_Y = 8;
-- 
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